Repetition Rate Generator
Description
The Repetion Rate Generator defines the period of the bunch cycle at PITZ.
Specification
IP-Interface (based on IP_UNI_XILINX Module)
- Line Trigger Input (50Hz TTL/50Ohm)
- External or Internal 9MHz Clock
- External or Internal Synchronization
- Fixed Output at 10Hz (2-fold Fanout,TTL-Out)
- Two 8-bit programmable frequency dividers (3-fold Fanout,TTL-Out each)
Block Scheme
